← ProblemsVerilog Language / Vectors

Bitwise operators

36%vectorsbasics

Build a circuit with two 3-bit inputs that computes:

  • out_or_bitwise — the bitwise OR of a and b
  • out_or_logical — the logical OR of a and b (1-bit result)
  • out_not — a 6-bit output containing the inverse of b in the upper half (bits 5..3) and the inverse of a in the lower half (bits 2..0)