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Simple FSM 1 (synchronous reset)
36%fsmImplement the same two-state Moore machine as in the previous exercise, but this time with a synchronous reset.
| Current state | next state when in = 0 | next state when in = 1 | output out |
|---|---|---|---|
| A | B | A | 0 |
| B | A | B | 1 |
out is 1 in state B and 0 in state A. The active-high reset input is sampled on the rising clock edge and forces the machine into state B.