← ProblemsCircuits / Sequential Logic / Latches and Flip-Flops
D latch
36%flip-flopsproceduresconditionalsImplement a D latch. Unlike a flip-flop, a latch is level-sensitive, not edge-sensitive:
- While
enais 1, the latch is transparent:qcontinuously followsd. - While
enais 0, the latch is opaque:qholds whatever value it had whenenalast went low, ignoringd.
Note: a latch is intentionally created here by an incomplete assignment, so a "latch inferred" warning from the synthesizer is expected and correct for this problem.