Serial two's complementer (Moore)
15%fsmfsm-designBuild a one-input, one-output serial two's complementer as a Moore machine. The input x delivers a binary number one bit per clock cycle, least-significant bit first, and the bit stream may be arbitrarily long. The output z must deliver the two's complement of the number received so far, also LSB first.
Recall the shortcut for negating a binary number bit-serially, starting from the LSB: copy every bit up to and including the first 1, then invert every bit after it.
Because this is a Moore machine (output is a function of state only), the output bit is registered: the z bit corresponding to an input bit appears in the clock cycle after that input bit. Three states suffice:
| State | Meaning | z | x=0 → | x=1 → |
|---|---|---|---|---|
| A | still copying, last output bit 0 | 0 | A | B |
| B | first 1 just passed (or inverted bit was 1) | 1 | B | C |
| C | inverting, last input bit was 1 | 0 | B | C |
The machine has an asynchronous, active-high reset areset that returns it to state A (a reset starts a fresh number).