Three flip-flops and gates

Build the following sequential circuit (given as a schematic on an exam). It contains three positive-edge-triggered D flip-flops, all initially holding 0 before the machine starts, one input x, and one output z. Call the flip-flop outputs q0, q1, q2:

• Flip-flop 0's D input is x XOR q0 (its own output fed back through an XOR gate).
• Flip-flop 1's D input is x AND ~q1 (its complemented output fed back through an AND gate).
• Flip-flop 2's D input is x OR ~q2 (its complemented output fed back through an OR gate).
• The output is the NOR of all three flip-flop outputs: z = ~(q0 | q1 | q2) — so z is 1 only when all three flip-flops hold 0.