Circuit from a shift register (3-input LUT)

Build a programmable 3-input look-up table (LUT) the way FPGAs do it: an 8-bit shift register holds the truth table, and a multiplexer reads it out.

• Write path: an 8-bit shift register Q[7:0]. When enable is 1, on each rising clock edge the register shifts left by one: S enters at Q[0] and each bit moves up (Q[7] is shifted out and lost). When enable is 0 the register holds.
• Read path (combinational): the three inputs A, B, C form an index with A as the MSB, and the output is the selected bit:

Z = Q[{A, B, C}]