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FSM from a state-assigned table
15%fsmAn FSM has been designed and its states already assigned binary codes. The state register is y[2:0], the input is x, and the output is z. Implement the machine described by this state-assigned table:
Present state y[2:0] | Next state if x=0 | Next state if x=1 | Output z |
|---|---|---|---|
000 (A) | 000 | 001 | 0 |
001 (B) | 001 | 100 | 0 |
010 (C) | 010 | 001 | 0 |
011 (D) | 001 | 010 | 1 |
100 (E) | 011 | 100 | 1 |
States 101, 110, and 111 are unused (you may treat them as don't-cares; they are never entered after reset).
reset is synchronous and active-high, forcing the state to 000.