History shift register

A global branch-history register records the outcomes (taken / not-taken) of the most recent conditional branches as a bit vector, with the newest outcome in bit 0. Because predictions are made speculatively, the history records predicted outcomes — and must be repaired when a prediction turns out to be wrong.

Build a 32-bit global history register with two update mechanisms, evaluated on each rising clock edge:

• Misprediction recovery (higher priority): when train_mispredicted = 1, reload the register with the history that should follow the mispredicted branch: the history that was current when that branch was predicted (train_history) shifted left by one, with the branch's actual outcome train_taken shifted into bit 0 — i.e. {train_history[30:0], train_taken}. This discards the bogus history produced by wrong-path speculation.
• Prediction shift: otherwise, when predict_valid = 1, shift the predicted outcome into the register: predict_history <= {predict_history[30:0], predict_taken}.

If neither occurs, the register holds. areset is an asynchronous active-high reset that clears the history to 0. The output predict_history is the current register value.