← ProblemsVerilog Language / Procedures
Avoiding latches
36%proceduresconditionalsYou are decoding arrow keys from a PS/2 keyboard. The keyboard sends a 16-bit scancode, and your circuit must raise exactly one of four outputs when it sees an arrow-key code:
| scancode | output set to 1 |
|---|---|
16'he06b | left |
16'he072 | down |
16'he074 | right |
16'he075 | up |
For any other scancode, all four outputs must be 0.
The pitfall: with four outputs and five-plus cases, writing an assignment for every output in every case arm is verbose and error-prone — and forgetting even one creates a latch. The robust idiom is to assign default values to all outputs first, at the top of the always block, then let the case statement override just the one output that should be 1.